A researcher at the Indian Institute of Technology (IIT) Delhi has designed a device for high-density magnetic memory,in collaboration with the National University of Singapore(NUS). The proposed device may help reduce frequent charging of wireless electronic devices such as mobile phones and other Internet of Thing (IoT) based devices.

The main memory, i.e., the Random-access memory (RAM) is most commonly used in modern computer architecture. These are SRAMs and DRAMs, which are based on CMOS technology. They are fast but volatile and require a constant supply of power, which consumes lots of energy. But, if these could be made non-volatile, then computing could be made more energy-efficient.

Spintronics memories like spin-transfer torque magneto-resistive RAM (STT-MRAM) and spin-orbit torque magneto-resistive RAM (SOT-MRAM) are inherently non-volatile. They consume no power at standby. Also, their operation speeds are comparable to RAMs. Hence, these spintronics memories are the most potential candidates for replacing current electronic RAMs, says IIT Delhi statement.

SOT-MRAMs are better than STT-MRAM in terms of reliability and writing speed but lags in achieving high integration density. This is because, unlike STT-MRAM, which is a two-terminal device and needs one transistor for reading and writing operation, the SOT-MRAMs require two transistors each for reading and writing. Thus SOT-MRAM requires a larger area per bit as compared to STT-MRAM, as shown in figure-1.

Also, SOT-MRAM is less prone to breakdown due to separate read and write paths, this is absent in STT-MRAMs. Hence, SOT-MRAM is the preferred choice among the research community however significant work is required to increase their areal density.

In a collaborative work between Prof. Rahul Mishra from the Centre for Applied Research in Electronics (CARE), IIT Delhi,and Prof. Hyunsoo Yang from the National University of Singapore(NUS) a possible solution for achieving higher integration density in SOT-MRAMs was proposed and experimentally demonstrated.

Prof. Rahul Mishra, CARE, IIT Delhi said, “We demonstrated a shared write channel based multibit SOT cell scheme, which reduces the number of transistors required per bit. This cell design requires half the area compared to conventional SOT MRAM, thus almost doubles the area efficiency of the memory chip”.

To make the above design feasible, the team designed a magnetic memory device, which can be programmed by the application of gate voltage. The gate voltage was used to migrate oxygen ions in the device, which resulted in modulation of the spin current polarity as shown in Figure 3. Thus, cells can now be written individually, and hence they obtained a full-fledged, working area-efficient SOT memory. The work was published in Physical Review appliedjournal.

Prof. Mishra further said, “The results of this work could eventually help to develop low power electronic devices.The frequent charging of wireless electronic devices such as mobile phones, IoT devices, etc would be significantly reduced with the proposed device. It would be especially useful for industrial applications where sensors are put in locations, which are not easy to access. Low power and high-density memory devices would not only help reduce global energy footprint but the saved energy can also be used for extra computational tasks”.

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Keywords: power, computing, memory, data processing, CPU, Indian Institute of Technology, IIT Delhi, National University of Singapore,NUS, magnetic memory, wireless devices, mobile phones, Internet of Thing, IoT devices

Lensless cameras do not have a lens which, in a conventional camera, acts as a focusing element allowing the sensor to capture a sharp photograph of the scene. Due to the absence of this focusing element, the lensless camera captures a multiplexed or globally blurred measurement of the scene. IIT Madras and Rice University researchers have developed a deep learning algorithm for producing photo-realistic images from the blurred lensless capture.

Taking out a lens can lead to the miniaturization of a camera. Researchers globally are trying to find substitutes for lenses, says IIT Madras statement.

In 2016, Prof. Ashok Veeraraghavan’s lab at Rice University, U.S., registered success in making a lensless camera. They were able to develop a low-cost and low-weight ultra-thin lensless camera. The function of lenses is to focus the incoming light. In these newly developed lensless cameras, a thin optical mask was placed just in front of the sensor at a distance of approximately 1 mm. However, because of the absence of focusing elements, the lensless camera captures blurred images restricting their commercial use.

Researchers have now developed a computational solution to this problem. The team developed a de-blurring algorithm, which can correct the blurred images taken from a lensless camera. The findings were presented as a paper in the prestigious IEEE International Conference on Computer Vision and an extended version appeared in IEEE Transactions on Pattern Analysis and Machine Intelligence.

This Research was led at IIT Madras by Dr. Kaushik Mitra, Assistant Professor, Department of Electrical Engineering. The research team included Salman Siddique Khan, Varun Sundar and Adarsh VR from IIT Madras. Prof. Ashok Veeraghavan led the Rice University team which included Dr. Vivek Boominathan and Mr. Jasper Tan.

“Existing algorithms to deblur images based on traditional optimization schemes yield low-resolution ‘noisy images.’ Our Research team used Deep Learning to develop a reconstruction algorithm called ‘FlatNet’ for lensless cameras which resulted in significant improvement over traditional optimization-based algorithms. FlatNet was tested on various real and challenging scenarios and was found to be effective in de-blurring images captured by the lensless camera”, Dr. Kaushik Mitra said.

Further, Dr. Mitra said, “Lensless imaging is a new technology and its true potential in solving imaging/vision problems has not been exploited completely. Therefore, we are working on designing newer and better lensless cameras using data-driven techniques, devising efficient algorithms for doing inference on lensless captures and looking into interesting and important applications like endoscopy and smart surveillance, among other areas, where one can fully realize the benefits of lensless imaging.”

This research was funded by National Science Foundation (NSF) CAREER and NSF EXPEDITIONS, U.S., Neural Engineering System Design (NESD) – Defense Advanced Research Projects Agency (DARPA), U.S., National Institutes of Health (NIH) Grant, U.S., and Qualcomm Innovation Fellowship India 2020.

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Keywords: Algorithm, Lensless Camera, Miniature Camera, Indian Institute of Technology, IIT Madras, Rice University, Vision applications, Augmented Reality (AR), Virtual Reality (VR), Security, Smart Wearables, Robotics

To increase awareness about the usage of FOSS in governance and Government functioning, and adoption of FOSS, a virtual roundtable discussion ‘Free and Open Source Software (FOSS) in Government’ was organized by the Ministry of Electronics and Information Technology (MEITY) in collaboration with Omidyar Network India on April 22, 2021.

Speaking at the occasion, Shri Ajay Sawhney, Secretary, Ministry of Electronics and Information Technology, appraised the steps taken by MeitY like Policyfor Open Source Software in 2015 to Open Source Collaborative development of Aarogya Setu. “I am delighted to see the interest in further advancing the adoption of FOSS in Government among a wide range of Government leaders, Academia and FOSS innovators. MeitYwill continue to play a key role in this journey. We are also pleased to announce the #FOSS4GOV Innovation Challenge, which will harness the innovation potential of the FOSS community and start-ups to solve for critical issues in GovTech. More such efforts will be forthcoming.”

Making a presentation on the Potential of FOSS in India, Shri Varad Pande, Partner, Omidyar Network India, said “We see FOSS as a key component of GovTech 3.0, which is about building secure and inclusive Open Digital Ecosystems (ODEs) that harness the potential of social innovators to help solve India’s toughest problems. We are excited to see MeitY advancing the adoption of FOSS in Government in a thoughtful and strategic manner and are delighted to partner with them on this journey.”

Shri Abhishek Singh, President and CEO, NeGD and CEO, MyGov,and MD, Digital India Corporation moderated sessions wherein stakeholders shared their experiences on successful deployment of FOSS-based platforms like Aadhaar and UPI in India and highlighted best-practices and learnings for all participants. Presentations were made on successful FOSS led innovations adopted by Governments of Himachal Pradesh, Haryana, Kerala as well as open source enterprise solutions. The speakers includedrepresentatives from EkStep Foundation, Samagra Governance, Civic Data Lab, International Centre for Free and Open Source Software (ICFOSS), and Frappe Technologies (creators of ERPNext). The collaborative potential of FOSS was palpable in the discussion with FOSS community members, innovators, and academia. Representatives from State Governments shared their experiences about building tech platforms, and reflected on challenges where open source technology could be most useful.

The Ministry of Electronics & Information Technology also announced a #FOSS4GOV Innovation Challenge to accelerate adoption of Free and Open Source Software (FOSS) In Government. The #FOSS4GOVInnovation Challenge calls upon FOSS innovators, technology entrepreneurs and Indian Startups to submit implementable open source product innovations in CRM and ERP with possible applications for Govtech in Health, Education, Agriculture, Urban Governance etc. Participants to be eligible for incubation support, prize money, mentorship by domain experts, institutional support from eminent organizations for incubation of ideas and listing of solutions on GeM.Further details about the challenge and how to participate will be shared soon by the Ministry through MyGov and MeitY Startup Hub.

The roundtable provided a forum for eGov leaders of States, Central Ministries and Agencies to share their experiences, best practices and learnings in using FOSS in GovTech platforms and applications. Participants shared perspectives on the way forward to drive adoption of FOSS in Government, and the announcement of the #FOSS4GOV Innovation Challenge was welcomed as an important step forward in this direction.

DrAmitaRawat and Prof UdayanGanguly from the Department of Electrical Engineering, Indian Institute of Technology, Bombay (IIT Bombay), in collaboration with researchers from IMEC, Leuven, Belgium, have experimentally validated their previously proposed method to estimate the change in performance of an electronic circuit caused by manufacturing variations. This is the first time that the experimental validation of variations predicted using physics-based modeling has been reported. The predictions can be integrated with circuit design software, thus making it possible to design better-performing circuits. This work was partially funded by the Indian Institute of Technology Nano Fabrication Lab (IITBNF Lab), the Ministry of Human Resource Development (MHRD), and the Department of Science and Technology (DST).

Patterns are drawn using UV light on semiconductor chips to mark the channel, gate, interconnects, and other circuit components. Patterns with lines and spaces smaller than 10 nanometer tend to have fluctuations of about a nanometer. It is also challenging to place dopant atoms perfectly. The gate metal has nanoscale crystals that are not oriented uniformly in the same direction leading to different atomic interfaces between metal crystal and gate insulator. These local physical variations can significantly affect the electrical properties of the transistor. “For example, the variation in how metal is deposited affects the value of the gate voltage at which the transistor starts conducting current,” explains Dr Rawat, the lead author of the study.

As the building blocks of electronic circuits approach the atomic scale, the physical variations become substantial compared to the component dimensions. In commercially-used design and simulation softwares, circuit performance is inexactly evaluated based on simple variation in electrical properties of the transistor that is increasingly inaccurate as transistors shrink. “We provide process specific physics-based estimates of the electrical variation. It enables a more accurate evaluation of the circuit performance,” says Dr Rawat. “The designers can also get an idea of how the variation will alter if they change from one manufacturing process to another,” she adds.

To find the influence of the physical variations on the circuit performance, engineers first need to evaluate its effect on the transistor’s electrical properties. Currently, computational methods are used to study the structures of a few hundreds of transistors to find variations in electrical properties. With hours of costly simulations needed to calculate each transistor’s parameters, the process is computationally expensive and time-consuming. “Also, this method does not provide a simple, intuitive model connecting the structural variations to electrical variations of the transistors, necessary for the circuit designers,” comments Prof Ganguly.

“Our team developed the theoretical modelling of variability over nine years and three PhD theses. The journey is chronicled in a magazine article in IEEE Nanotechnology Magazine. Now our work has reached the experimental validation phase,” says Prof Ganguly.

The researchers created a mathematical model that accurately predicts variations in the transistor electrical properties based on the changes in the physical parameters, such as fluctuations of the pattern lines or metal nanocrystal orientation. The same model works for any manufacturing process. They used this transistor variation data to create a ‘variabilityaware’ transistor model to be used in a commercial design and simulation software. Thus circuits designed using this model capture the actual variability due to the manufacturing process, and designers can get an accurate estimation of the circuit performance. “The beauty of our platform is that the circuit performance prediction can be made available commercially, without significantly adding to the cost,” comments Dr Rawat.

“In addition to making it easier to design better-performing circuits, the proposed method can also provide feedback to the foundry team for improving their processes,” says Dr Rawat. The process designer can determine which process dependent inputs give the desired physical variability parameters. “It is like building a bridge between the circuit designers and the process team.”

In the current study, the researchers used their model to predict the physical variations for the 14nm technology process. They compared these values with the experimentally measured physical variations and found them to match well. They also estimated the variations in electrical properties of the transistor, and these agreed with the experimentally measured variations of a cluster of 250 transistors made with the 14nm technology. The worst and best case errors were within acceptable limits. “Such elaborate experimental validation has not been reported earlier,” remarks Dr Rawat.

The researchers plan to provide this framework as a technology package to be plugged into the circuit design software. “We need to collaborate with foundries to access the latest data of manufacturing processes they use. We can create the process-specific package and get it validated from the foundry. It can evolve into an industry standard,” said DrRawat.

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Keywords: circuit performance, IIT Bombay, circuit design, software, IITBNF Lab, MHRD, Department of Science and Technology, DST.

Computing infrastructure has already been installed in four premier institutions and installation work is in rapid progress in 9 more. Completion in of Phase II of NSM in September 2021 will take the country’s computing power to 16 Petaflops (PF). MoUs have been signed with a total of 14 premier institutions of India for establishing Supercomputing Infrastructure with Assembly and Manufacturing in India. These include IITs, NITs, National Labs, and IISERs.

Infrastructure planned in NSM Phase I has already been installed and much of Phase II will be getting in place soon. Phase III, initiated this year, will take the computing speed to around 45 Petaflops. This will include three systems of 3 PF each and one system of 20PF as a national facility.

The National Supercomputing Mission was launched to enhance the research capacities and capabilities in the country by connecting them to form a Supercomputing grid, with National Knowledge Network (NKN) as the backbone. The NSM is setting up a grid of supercomputing facilities in academic and research institutions across the country. Part of this is being imported from abroad and part built indigenously. The Mission is being jointly steered by the Department of Science and Technology (DST) and the Ministry of Electronics and Information Technology (MeitY) and implemented by the Centre for Development of Advanced Computing (C-DAC), Pune, and the Indian Institute of Science (IISc), Bengaluru.

PARAM Shivay, the first supercomputer assembled indigenously, was installed in IIT (BHU), followed by PARAM Shakti, PARAM Brahma, PARAM Yukti, PARAM Sanganak at IIT-Kharagpur IISER, Pune, JNCASR, Bengaluru and IIT Kanpur respectively.

A new dimention has now been added in India’s march towards leadership position in supercomputing with the convergence of HPC and Artificial Intelligence (AI). A 200 AI PF Artificial Intelligence supercomputing system has been created and installed in C-DAC, which can handle incredibly large-scale AI workloads increasing the speed of computing-related to AI several times. PARAM Siddhi – AI, the high-performance computing-artificial intelligence (HPC-AI) supercomputer, has achieved global ranking of 62 in TOP 500 most powerful supercomputer systems in the world, released on 16th November 2020.

The mission has also created the next generation of supercomputer experts by training more than 4500 HPC aware manpower and faculties till date. To expand the activities of the HPC training, four NSM Nodal Centres for training in HPC and AI have been established at IIT Kharagpur, IIT Madras, IIT Goa and IIT Palakkad. These centres have conducted online training programs in HPC and in AI.

Powered by the NSM, India’s network of research institutions, in collaboration with the industry, is scaling up the technology and manufacturing capability to make more and more parts in India. While in Phase I, 30 percent value addition is done in India that has been scaled up to 40 percent in Phase II. India has developed an Indigenous server (Rudra), which can meet the HPC requirements of all governments and PSUs.

The three phases will provide access to High-Performance Computing (HPC) Facilities to around 75 institutions and more than thousands of active researchers, academicians working through Nation Knowledge Network (NKN) – the backbone for supercomputing systems.

Researchers led by Dr Pawan Goyal have developed a digital infrastructure for the efficient processing of Sanskrit texts, by effectively combining state-of-the-art machine learning techniques and traditional linguistic knowledge from Sanskrit. The proposed framework is based on Energy-based models and it enables the encoding of relevant linguistic information as constraints.

“Processing of Sanskrit texts poses several challenges owing to the high lexical productivity of the words, free word order in poetry, euphonic assimilation of sounds at the word boundaries and phonemic orthography followed in writing. Keeping these in mind, we proposed a generic graph-based framework that takes advantage of the free word-order nature of the language. Further, we make use of linguistic insights from the traditional Sanskrit grammar for learning the feature function and applying the relevant constraints.” explained Dr. Goyal.

“Our proposed framework substantially reduces the training data requirements to as low as 10%, as compared to that of the neural state-of-the-art models. In all the Sanskrit-related tasks discussed in the work, we either achieve state-of-the-art results or ours is the only data-driven solution for those tasks, added Dr Goyal.”

This work is accepted for publication in the Computational Linguistics journal published by the MIT Press. This work has been carried by research scholar Dr. Amrith Krishna, currently, a post-doctoral fellow at the University of Cambridge, supervised by Dr. Pawan Goyal. The paper currently addresses the tasks of word segmentation, morphological parsing, dependency parsing and poetry to prose conversion of Sanskrit text.

The classical language has a rich literary tradition spanning more than two millennia that encapsulates the cultural ethos of this civilizational nation. Works in Sanskrit, numbering more than 30 million extant manuscripts, include extensive epics, subtle and intricate philosophical, mathematical, and scientific treatises, and rich literary, poetic, and dramatic texts.

The proposed AI-based system, used in conjunction with interactive tools such as the Sanskrit Heritage reader, can aid the users in the easier analysis of these manuscripts with word-by-word analysis and translation, the relation between words, poetry to prose conversion, search and question answering, etc.

The research team is now actively collaborating with several external research groups to extend the application of the proposed system for automatic speech recognition and question-answering in Sanskrit.

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Keywords: Digital resources, languages, regional languages, Sanskrit,Computational processing, linguistics, Indian Institute of Technology, IIT Kharagpur, Artificial Intelligence, AI

About 500 experts from all over the country as well as from abroad are participating in this Congress. They will make presentations on their research-oriented findings on the focal theme. The aim is to explore how digital mapping innovations like ‘Drone’, ‘Artificial Intelligence’, which can now generate large-scale maps with higher accuracy (up to 10 cm), can help the administrators and planners establish more effective utility projects at the grass-root level.

Inaugurating the congress, Governor of West Bengal, Mr.JagdeepDhankar lauded the various activities taken by NATMO to utilise the advances made in the areas of cartography for the benefit of the country. INCA is the only professional body of cartographers and geospatial technologists. It was founded on 7th August, 1979 at Hyderabad. It has become one of the biggest organizations of its kind in the world.

Presiding over the inaugural programme, Dr.Tapati Banerjee, Director, NATMO and President, INCA, noted that cartography or science of map making is as old as human civilization and it has been playing an important role in the activities of mankind from the very beginning of civilization. “Cartography, like architecture, is the art, science, and technology of map production and reproduction. It is one of the media of communication like graphicacy. It is a representation of any segment of spatial reality with a view to communicate and message most effectively”, she said.

The Surveyor General of India and the Director General of Geological Survey of India, Mr.NabinTomar underlined that from ancient times cartographers are making maps which helped travellers and in the excavation of minerals. Now, their role has become wider. They are also helping to chalk out development plans.

The Congress is being held both in physical and virtual mode, keeping in view the pandemic situations. The programme includes special lectures and plenary sessions, apart from technical sessions on a wide range of sub-themes from `Reprogramming of Traditional Cartographic Practices into Digital and Alternative Cartography’, and `ICT and interactive map services in smart planning for food and livelihood security’ to `Water Resource Management’.

With inputs from India Science Wire.

This application provides the Hyperspectral information in point data over the Goa state, view the information in the graphical format reflection agents the wavelength, and there are three different spectral ranges are as

1.VNIR (0-2500nm) visible and near-infrared,

2.FTIR (2501-15000nm) Fourier-transform infrared spectroscopy,

3.Entire Spectra (0-15000nm).

The Hyperspectral signatures graph is found for the particular point information and it also it has the feature of matching wavelength, means it finds the nearest matching wavelength and also provides the matching percentage for the algorithm use for matching wavelength is creating buffer of every point the wavelength matching under particular buffer are saved, this will happen for every buffer point. At the end check highest number of matching wavelength is considered as nearest match.

The HySIS has information such as: Administrative layers (State Boundary, District Boundary, Taluka Boundary, Panchayat Boundary and Cadastral Boundary) thereby reaching out to the farmers in a more realistic manner. The App provides the easy to reach location in hierarchical pattern like State, District, Taluka, Panchayat and Cadastral. The point data provides the attribute information of soil and site characteristics and fertility information. The legend information is also available. The App can locate the user’s location on hierarchical drop down selection basis or else the GPS enabled location tracking. The real time GPS based tracking allows the user to collect information while on the go.

This App will benefit the Goan farmers, planners and executors. The App will be updated at regular intervals based on the technological developments as well as user’s feedback.

New website

The new website can be accessed at the URL http://164.100.166.47. It will be live at https://www.britatom.gov.in after July 9, 2020.

The new website is designed with a view to provide the most accurate, up-to-date information and share the knowledge and expertise in the field of nuclear technology for current and prospective customers. The new website is faster, easier to navigate and more user-friendly, with a uniform and structured user interface, responsive web design and high on accessibility. There are direct links to BRIT’s regional centres located at various parts of the country; products, services and customer support. Technical information such as various radioactive sources is also provided in a range of denominations. Updates regarding new product launches is also a part in the News section.

BRIT Bandhu Mobile App

The BRIT Bandhu mobile app has been launched for equipping the customers with more user-friendly tools and to match the requirements of a modern-day ecommerce platform. The application enables customers to track the status of their orders in a very easy manner, on the go. It also offers up-to-date notifications on invoices and reminders for renewal of procurement authorizations. The Chief Executive, BRIT has said that an updated version of the app will be launched in some time, which will enable customers to also place orders, make payment and perform other processing tasks which they can currently do on the BRIT website.

User feedback and experience are welcome at ceoffice@britatom.gov.in. The app is available for download in Google Play Store at https://play.google.com/store/apps/details?id=com.mindspacetech.BritBandhu.